TITLE:
FPGA-Based High-Frequency Digital Pulse Width Modulator Architecture for DC-DC Converters
AUTHORS:
V. Radhika, K. Baskaran
KEYWORDS:
Gray Code Encoding Scheme, High Frequency DPWM, Mealy Finite State Machine, One Hot Encoding Scheme
JOURNAL NAME:
Circuits and Systems,
Vol.7 No.4,
April
29,
2016
ABSTRACT: Digital pulse width modulator is an integral part in digitally controlled
Direct Current to Direct Current (DC-DC) converter utilized in modern portable
devices. This paper presents a new Digital Pulse Width Modulator (DPWM)
architecture for DC-DC converter using mealy finite state machine with gray
code encoding scheme and one hot encoding method to derive the variable duty
cycle Pulse Width Modulation (PWM) signal without varying the clock frequency.
To verify the proposed DPWM technique, the architecture with control input of
six, five and four bits are implemented and the maximum operating frequency
along with power consumption results is obtained for different Field
Programmable Gate Array (FPGA) devices. The post layout timing results are presented
showing that architecture can work with maximum frequency of 326 MHz and derive
PWM signal of 3.59 MHz. Experimental results show the implementation of the
proposed architecture in low-cost FPGA (Spartan 3A) with on-board oscillator
clock frequency of 12 MHz which is multiplied internally by two with Digital
Clock Manager (DCM) and derive the PWM signal of 1.5 MHz with a time resolution
of 1 ps.