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S. Malik, A. R. Wang, R. K. Brayton and A. Sangiovarmi-Vincentelli, “Logic Verification Using Binary Decision Diagrams in a Logic Synthesis Environment,” Proceedings of International Conference on Computer-Aided Design, Santa Clara, 7-10 November 1988, pp. 6-9. doi:10.1109/ICCAD.1988.122451

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