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Eguro, K., Hauck, S. and Sharma, A. (2005) Architecture Adaptive Range Limit Windowing for Simulated Annealing FPGA Placement. Microsoft Research, Design Automation Conference, San Francisco, 14-17 June 2005, 439-444.
http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=10020

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