1. Introduction
A number of VM MISO biquads utilizing different active elements have been proposed by the various researchers employing single active device [1] -[11] . MISO-type biquads are especially versatile because the same topology can be utilized through proper selection of input signal(s) to realize different filter functions. Such filters may be used in the implementation of touch tone telephone systems, FM stereo demodulators, phase locked loop etc. [12] . A number of new active elements have been presented in [13] . Recently Shaktour in [14] has used VDVTA in the formation of first order all pass (AP) filter. In this communication, we propose another application using single VDVTA for the realization of MISO-type biquad using three inputs and one output with two capacitors and one grounded resistor. The proposed circuit realizes four basic filter functions, namely LP, HP, BP and BR. In the case of LP filter, the structure enjoys an extra advantage of having both the capacitors grounded as preferred for integration point of view [15] . The circuit offers the advantage of independent control
of 
and
. SPICE simulation results using TSMC CMOS 0.18 μm process and ±0.9 V DC power supply
voltages verify the theoretical prediction.
2. The Proposed Circuit Topology
The block diagram of the VDVTA is shown in Figure 1, where
, 
and 
are input terminals and
, 
and 
are output terminals. All terminals of VDVTA exhibit high impedance values [14] . The VDVTA can be characterised by the following terminal equations:
(1)
The circuit analysis of Figure 2 yields the following output equation in terms of input signals:
(2)
Through proper selection of input signal(s) from Equation (2), Figure 2 realizes the following filter functions:
1) LPF; if 
and 
i.e.,
(3)
![]()
Figure 1. The symbolic notation of VDTA.
![]()
Figure 2. The proposed VM MISO-type configuration.
2) BPF; if 
and ![]()
i.e.,
![]()
(4)
3) HPF; if ![]()
and ![]()
i.e.,
![]()
(5)
4) BRF; if ![]()
and ![]()
i.e.,
![]()
(6)
from Equations (3)-(6), it is clear that there is no requirement of any matching condition.
Where
![]()
The natural frequency![]()
, ![]()
and quality factor ![]()
are given by:
![]()
(7)
![]()
(8)
![]()
(9)
The sensitivities of ![]()
with respect to passive components are found to be:
![]()
which are all low.
3. Simulation Results
To verify the theoretical prediction, the proposed circuit was simulated using
CMOS
VDVTA (with minor changes as shown in Figure 3) from [16] . The passive components of the proposed circuit were selected as C1 = 0.02 nF, C2 = 0.01 nF and R1 = 100 KΩ. The transconductances of VDVTA were controlled by bias currents. Figure 4 shows the simulated filter responses of LP, BP, HP and BR. These simulation results, thus, confirm the validity of the MISO-type proposed biquad. The comparison of proposed biquad with other available MISO- type VM-biquads with a single active element is summarized in Table 1.
![]()
Table 1. Comparison of proposed biquad with other available MISO-type VM-biquads using a single active device.
4. Conclusion
In this paper, an application of VDVTA is proposed in the form of VM-MISO-type biquad using three passive components. The proposed filter can realize the second-order LP, BP, HP and BR responses without changing the circuit topology and without any matching constraint(s). The LP filter response enjoys an additional advantage of having both the capacitors grounded as preferred for integration point of view [15] . The circuit offers low active and passive sensitivities. The SPICE simulation results using TSMC CMOS 0.18 μm process confirm the workability of the proposed structure.
NOTES
*Corresponding author.