Design Algorithm of FIR Filter Based on Coefficient Compression

Qingcao Huang

College of Rail Transit Locomotive and Rolling Stock, Hunan Railway Professional Technology College, Zhuzhou, China.

DOI: 10.4236/ojapps.2025.157140                

Abstract

This article proposes a new algorithm based on coefficient compression, which can be used for the design and implementation of various FIR filters, to address the problems caused by the limited quantization word length of traditional high-order filters. It addresses the performance degradation problem caused by quantization bit width in FIR, based on coefficient compression and modifications to the accumulator of FIR, which can improve the passband and stopband performance of FIR. And its serial implementation structure was proposed, and the algorithm’s degree of simplification in circuit implementation was verified through experiments.

Keywords

FIR Filter, Compensation Filter, Amplitude Response, Stop-Band Attenuation

1. Introduction

The application of Finite Impulse Response (FIR) filters in various digital systems has long been a challenging problem [1] [2]. The proposal of Parks-Mcclellan and other ripple design algorithms based on Remez exchange theory has made it possible to efficiently design high-order FIR filters through computer-aided design [2]-[5]. In the specific implementation process of FIR filters [6] [7], some problems will be encountered [8] [9]. The FIR filter structure of the most common coefficient pre storage architecture is shown in Figure 1 [1] [2].

Many people have made efforts to design and improve high-performance FIR filters, such as decomposing the transfer function and implementing it with multi-stage filters; the problem of using floating-point filters to calculate coefficients; using a sharpening filter to obtain better passband stopband response, and utilizing a low sensitivity filter to reduce the impact of bit width on the passband; implementing a filter using a completely multiplier free approach.

Figure 1. Structure of direct FIR filter.

2. Methods and Filter Expression

Due to the linear phase characteristics of FIR filters, their coefficients are symmetric about the center. We can implement this using a folded filter structure, where the corresponding units of the lateral delay are added first and then multiplied by the coefficients. This can reduce the number of multiplications by half, as shown in Figure 2.

Figure 2. Folding structure of FIR filter.

For traditional quantification methods, their folded structure can be expressed as:

$y\left[n\right]={\displaystyle {\sum }_{k=\frac{N+1}{2}}^N\left[x\left[n-N+k\right]+x\left[n-k\right]\right]\cdot \text{round}\left[h\left[k\right]\cdot 2^{\text{BW}}\right]/2^{\text{BW}}}$ (1)

$N$ is an odd number.

$\begin{array}{l}y\left[n\right]=x\left[n-\frac{N}{2}\right]\cdot \text{round}\left[2^{\text{BW}}\cdot h\left[\frac{N}{2}\right]\right]/2^{\text{BW}}\\ +{\displaystyle {\sum }_{k=\frac{N+1}{2}}^N\left[x\left[n-N+k\right]\right]\cdot \text{round}\left[2^{\text{BW}}\cdot h\left[k\right]\right]/2^{\text{BW}}}\end{array}$ (2)

$N$ is an even number.

where $N$ is the order of the filter, $h\left[k\right]$ is the ideal design coefficient value, and the round [] operation takes the closest integer, BW is the design coefficient quantization bit width. When using non equal width quantization, the output is represented as:

$y\left[n\right]={\displaystyle {\sum }_{k=\frac{N+1}{2}}^N\left[x\left[n-N+k\right]+x\left[n-k\right]\right]\cdot \text{round}\left[2^{\text{bw}\left[k\right]}\cdot h\left[k\right]\right]/2^{\text{bw}\left[k\right]}}$ (3)

$\begin{array}{l}y\left[n\right]=x\left[n-\frac{N}{2}\right]\cdot \text{round}\left[2^{\text{bw}\left[\frac{N}{2}\right]}\cdot h\left[\frac{N}{2}\right]\right]/2^{\text{bw}\left[\frac{N}{2}\right]}\\ +{\displaystyle {\sum }_{k=\frac{N+1}{2}}^N\left[x\left[n-N+k\right]\right]\cdot \text{round}\left[2^{\text{bw}\left[k\right]}\cdot h\left[k\right]\right]/2^{\text{bw}\left[k\right]}}\end{array}$ (4)

Among them, $\text{bw}\left[k\right]$ is the equivalent quantization bit width of each coefficient. For $\text{bw}\left[k\right]$ :

$\forall i\in \left[k,N-1\right],\exists \text{bw}\left[i\right]\le \text{bw}\left[i+1\right],\text{bw}\left[i\right]\in N$ (5)

The accumulation method is shown in Figure 3. The serial implementation structure is shown in Figure 4.

Figure 3. Accumulator modification structure.

Figure 4. Serial implementation structure.

In this algorithm, due to the different equivalent quantization bit widths of the coefficients in FIR filters with coefficient compression, their quantization methods differ from traditional methods. The comparison of methods is also different. First, shift all coefficients to the power of $2^M$ :

${b^{\prime }}_i=b_i\cdot 2^M\left(i\in \left[0,n\right],M\in Z\right)$ (6)

Make the coefficient with the maximum absolute value within the normalized range of 0.5 - 1, i.e.:

$\max \left(\left|b^{\prime }\right|\right)\in \left[0.5,1\right)$ (7)

Then, for the coefficient with the highest absolute value in the middle, allocate the same fixed-point quantization bit width as the conventional method to it Quantify. The initial quantization bit width is set to BW based on the actual bit width of the final memory, and the ideal value of the middle coefficient is ${b^{\prime }}_n$ . The quantization operation that shifts ${b^{\prime }}_n$ by BW bit width is defined as $\text{Qant}\left[{b^{\prime }}_n,\text{BW}\right]$ and the quantized coefficient value is represented as $B_n$ by binary complement. Therefore, the binary complement quantization range $Q$ can be known as:

$-2^{\text{BW}-1}\le Q\le 2^{\text{BW}-1}-1,Q\in Z$ (8)

Its equivalent quantization bit width $\text{bw}\left[n\right]$ :

$\text{bw}\left[n\right]=\text{BW}$ (9)

Its quantitative operation is as follows:

$B_n=\text{Qant}\left[{b^{\prime }}_n,\text{BW}\right]=\text{round}\left[{b^{\prime }}_n,2^{\text{BW}}\right]$ (10)

$2^{\text{BW}-2}\le \left|B_n\right|\le 2^{\text{BW}-1}-1$ (11)

The quantified range Temp_Scale is:

$\text{Temp\_Scale}=1$ (12)

The quantization bit width Temp_BW is:

$\text{Temp\_BW}=\text{BW}$ (13)

The cumulative left shift ${\text{Flag}}_n$ is:

${\text{Flag}}_n=0$ (14)

When the quantified range Temp_Scale reaches half, it can be determined whether the following equation holds:

$\forall i \in \left[0,n-1\right],\exists {b^{\prime }}_i<\frac{1}{2}\cdot \text{Temp\_Scale}$ (15)

$\text{Temp\_BW}=\text{Temp\_BW}$ (16)

${\text{Flag}}_{n-1}=0$ (17)

To quantify it, the equivalent quantization bit width is:

$B_{n-1}=\text{Qant}\left[{b^{\prime }}_{n-1},\text{Temp\_BW}\right]=\text{round}\left[{b^{\prime }}_{n-1}\cdot 2^{\text{Temp\_BW}}\right]$ (18)

$\text{bw}\left[n-1\right]=\text{Temp\_BW}$ (19)

When all unquantified coefficients meet the constraint requirements, there are:

$\text{Temp\_BW}=\text{Temp\_BW}+1$ (20)

${\text{Flag}}_{n-1}=1$ (21)

Halving operation:

$\text{Temp\_Scale}=\frac{1}{2}\text{Temp\_Scale}$ (22)

We can obtain:

$B_{n-1}=\text{Qant}\left[{b^{\prime }}_{n-1},\text{Temp\_BW}\right]=\text{round}\left[{b^{\prime }}_{n-1}\cdot 2^{\text{Temp\_BW}}\right]$ (23)

$\text{bw}\left[n-1\right]=\text{Temp\_BW}$ (24)

3. Example of Filter Design

The serial structure coefficient quantization flow chart is shown in Figure 5.

The serial structure quantization process is shown in the following Table 1:

Figure 5. Serial structure coefficient quantization flow chart.

Table 1. Serial quantization process.

Coefficient to be quantified $b_{n-1}$	Unquantified coefficients all < 0.5Temp_Scale?	After update Temp_BW	After update Temp_Scale	Equivalent quantization bit width $\text{bw}\left[n-1\right]$	Shift flag Flag	Left shift and quantification
$b_4=0.87968$	No $\left|b_4\right|>0.5$	8	1	8	0	$B_4=\text{round}\left[b_4\ast 2^7\right]=113$
$b_3=0.37687$	Yes $\left|b_3\right|,\left|b_2\right|,\left|b_1\right|,\left|b_0\right|<0.5$	9	0.5	9	1	$B_3=\text{round}\left[b_3\ast 2^8\right]=96$
$b_2=-0.26156$	No $\left|b_2\right|>0.25$	9	0.5	9	0	$B_2=\text{round}\left[b_2\ast 2^8\right]=-67$
$b_1=-0.05899$	Yes $\left|b_1\right|,\left|b_0\right|<0.25$	10	0.25	10	1	$B_1=\text{round}\left[b_1\ast 2^9\right]=-30$
$b_0=0.01751$	Yes $\left|b_1\right|,\left|b_0\right|<0.125$	11	0.125	11	1	$B_0=\text{round}\left[b_0\ast 2^{10}\right]=18$

As shown in the above Figure 6 and Figure 7, the new algorithm uses serial quantization, which improves the coefficient accuracy better than traditional fixed-point quantization methods. Specifically, it has more stop band attenuation, smaller transition band width, and smaller pass band ripple. The minimum stop band attenuation of traditional quantization methods is 48 dB, while the improved algorithm is 61.3 dB, and the effect is very significant. The comparison chart of the minimum stop band attenuation of its spectral response is as follows:

As shown in the above Figure 8, the new algorithm has more quantization word lengths on both sides of the coefficients, and its accuracy is significantly higher than traditional algorithms at lower quantization memory bit widths.

Figure 6. Comparison of amplitude frequency response of serial quantization coefficients.

Figure 7. Frequency response pass band details.

Table 2. Resource comparison of equal bit width serial implementation.

DSP achieve	ALUT	memory	DSP	memory (bit)
Traditional serial structure	118	240	1	126
Serial structure of this article	131	261	1	126
Resource increment	11.0%	8.8%	0.0%	0.0%

As shown in the table above (Table 2), the implementation of the new algorithm includes a shift binary selector, which is the reason for the increased consumption of ALUT resources.

From the above table (Table 3), it can be seen that due to the increase in quantization bit width, ALUT and memory resources have increased by about 15%; The original 9 × 9 multiplier could be implemented using only one DSP, but with the increase in the bit width of the multiplier, the system needs to use an 18 × 18 multiplier, which is equivalent to two DSPs in effect. Therefore, the resources of the multiplier have increased, doubling by 100%.

Figure 8. Comparison of stop band attenuation under different position widths.

Table 3. Resource consumption of performance prerequisites such as serial implementation.

DSP achieve	ALUT	memory	DSP	memory (bit)
Traditional serial structure	562	1105	1	594
Serial structure of this article	611	1209	1	594
Resource increment	8.7%	9.4%	0.0%	0.0%

4. Conclusion

Due to the use of serial quantization, the accuracy of coefficient quantization values has been significantly improved compared to traditional fixed-point quantization methods, provided that the bit width of the multiplier and coefficient memory is not increased, and the filter order is not increased. Next, parallel structures can be used to further improve its performance, or a series parallel hybrid approach can be adopted to further enhance the accuracy of coefficient quantization values.

Conflicts of Interest

The author declares no conflicts of interest regarding the publication of this paper.

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