Tunable Floating Resistor Based on Current Inverting Differential Input Transconductance Amplifier

Zainab Haseeb^*, Dinesh Prasad, Mainuddin  , M. W. Akram

Jamia Millia Islamia, New Delhi, India.

DOI: 10.4236/cs.2020.115005                

Abstract

This paper presents a floating resistor employing CIDITA (current inverting differential input transconductance amplifier). The proposed floating resistor is based on CMOS technology of 0.18 μm. For the realization of this floating inductor, two CIDITA have been cascaded together, no other passive elements are used, giving advantage of reduced chip area and hence reduced losses. The given circuit topology has an advantage of realizing both positive and negative resistors. This paper presents a simple circuitry of floating resistor in which the value of resistance can be tuned by adjusting the gate voltage of MOSFET. The PSpice simulation result shows constant resistance of 1.6 KΩ for frequency bandwidth of 1 Hz to 1 MHz, with supply voltage of ±1.25 volts.

Keywords

Floating Resistor, CDTA, CIDITA

1. Introduction

The use of passive resistors is generally avoided while implementing precision based analog integrated CMOS circuits. The tolerance value, fabrication process it has undergone or the temperature variations in which the passive resistors are being used can also contribute to 20% change in the accurate value of resistor [1]. These reasons are enough for the requirement of CMOS based active resistors. Several other varieties of applications of the floating resistor include AGC circuits (automatic gain control), automatically tuned oscillators and filters and even in voltage controlled amplifiers [2]. Several other floating resistors have been proposed in literature to date using CMOS technology, such as square law floating resistor, positive-negative floating resistor, voltage controlled resistor, etc. [1] - [17].

This paper has proposed a novel approach to realize a floating resistor using modern active building block CIDITA. As it is a current mode based active building block, it has several advantageous features when compared with voltage mode. To characterize the performance of proposed voltage-controlled fully floating resistor the simulation results are provided using PSpice.

Vast numbers of active building blocks are already proposed to date. CDTA (current differencing transconductance amplifier) has been proved to be an important and versatile building block with several advantageous features. Similar to CDTA there is CITA (current inverting transconductance amplifier), with the difference that the current differencing unit (CDU) is replaced by current inverting unit (CIU). If the single input transconductance amplifier in CITA is replaced by differential input transconductance amplifier, then CIDITA (current inverting differential input transconductance amplifier) is obtained. It was discussed first of all in [18]; however its CMOS implementation and characteristic parameters have been discussed in [19]. CIDITA shows several advantageous features such as wider bandwidth, input current with better linearity range, greater accuracy and low operating voltage. CIDITA shows maximum transconductance better than that of CCCCTA and DDCCTA. For CMOS implementation, CIDITA uses lesser number of transistors and consumes less power than above mentioned two active building blocks [20] [21].

2. Block Description

The CIDITA has been used to propose a floating resistor. The symbol of CIDITA is shown in Figure 1.

Here I_B represents the bias current. CIDITA has four terminals n, x, v and z, where,

I_n represents current at the terminal n;

I_x and V_x represents current and voltage at terminal x respectively;

I_v and V_v represents current and voltage at terminal v respectively;

I_z and V_z represents current and voltage at terminal z respectively.

Figure 1. Symbolic representation of CIDITA [20].

It has transconductance of g_m.

_{$g_m\text{=}\sqrt{\frac{{\mu }_n{C}_{ox}W}{I_{BL}}}$} (1)

μ_n is the mobility of electron;

C_ox is capacitance of gate oxide/unit area;

W/L is the aspect ratio.

3. Proposed Floating Resistor Using CIDITA

The following figure shows the realization of floating resistor using CIDITA (see Figure 2).

Figure 2. Floating resistor based on CIDITA and its equivalent symbol.

$I_1=g_{m2}\left(V_1-V_2\right)$ (2)

$I_2=-g_{m1}\left(V_1-V_2\right)$ (3)

$\left(\begin{array}{c}{I}_1\\ I_2\end{array}\right)=\left[\begin{array}{cc}{g}_{m2}& -g_{m2}\\ -g_{m1}& g_{m1}\end{array}\right]\left(\begin{array}{c}{V}_1\\ V_2\end{array}\right)$

If, $g_{m1}=g_{m2}$

The floating resistor can be characterized by the following matrix.

$\left(\begin{array}{c}{I}_1\\ I_2\end{array}\right)=g_m\left[\begin{array}{cc}1& -1\\ -1& 1\end{array}\right]\left(\begin{array}{c}{V}_1\\ V_2\end{array}\right)$

4. Simulation Results

To evaluate the performance of recently proposed voltage-controlled floating resistor, PSpice simulations have been done. The technology node used is 0.18 μm TSMC and supply voltage of ±1.25 volts.

It is clear from above magnitude response of the proposed floating resistor shown in Figure 3, that the resistance remains constant for the frequency range of 1 Hz to 1 MHz, hence providing same value for wider bandwidth, that is resistance of 1.629 kΩ. The DC characteristic (Voltage versus I_x+/I_x−) of the proposed floating resistor is shown in Figure 4.

Figure 3. Input impedance of proposed floating resistor.

Figure 4. DC characteristics of the proposed floating resistor.

5. Conclusion

Novel configuration of voltage-controlled floating resistor has been proposed using current inverting differential input transconductance amplifier (CIDITA). The proposed resistor has several noticeable features like no matching constraints required, it is electronically tunable, has better linearity range and simple circuitry. The circuit enjoys using zero passive components hence reducing the losses and chip area. The proposed resistor can be used in various RC circuits and precision based analog integrated CMOS circuits.

Conflicts of Interest

The authors declare no conflicts of interest regarding the publication of this paper.

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