[1]
|
Rajendran, J., Manem, H., Karri, R. and Rose, G.S. (2010) Memristor Based Programmable Threshold Logic Array. Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, Anaheim, 17-18 June 2010, 5-10. http://dx.doi.org/10.1109/NANOARCH.2010.5510933
|
[2]
|
Ng, K.A. and Chan, P.K. (2005) A CMOS Analog Front-End IC for Portable EEG/ECG Monitoring Applications. IEEE Transactions on Circuits and Systems I: Regular Papers, 52, 2335-2347. http://dx.doi.org/10.1109/TCSI.2005.854141
|
[3]
|
Mallinson, M. and Spitalny, P. (1993) Programmable Gain Amplifier. US Patent No. 5233309. US Patent and Trademark Office, Washington DC.
|
[4]
|
Hall, T.S., et al. (2005) Large-Scale Field-Programmable Analog Arrays for Analog Signal Processing. IEEE Transactions on Circuits and Systems I: Regular Papers, 52, 2298-2307.
|
[5]
|
Harrison, R.R., Bragg, J.A., Hasler, P., Minch, B.A. and Deweerth, S.P. (2001) A CMOS Programmable Analog Memory-Cell Array Using Floating-Gate Circuits. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 48, 4-11. http://dx.doi.org/10.1109/82.913181
|
[6]
|
Türel, Ö. and Likharev, K. (2003) Cross Nets: Possible Neuromorphic Networks Based on Nanoscale Components. International Journal of Circuit Theory and Applications, 31, 37-53. http://dx.doi.org/10.1002/cta.223
|
[7]
|
Afifi, A., Ayatollahi, A. and Raissi, F. (2009) STDP Implementation Using Memristive Nanodevice in CMOS-Nano Neuromorphic Networks. IEICE Electronics Express, 6, 148-153. http://dx.doi.org/10.1587/elex.6.148
|
[8]
|
Afifi, A., Ayatollahi, A. and Raissi, F. (2009) Implementation of Biologically Plausible Spiking Neural Network Models on the Memristor Crossbar-Based CMOS/Nano Circuits. European Conference on Circuit Theory and Design, ECCTD 2009, Antalya, 23-27 August 2009, 563-566.
|
[9]
|
Turel, O., Lee, J.H., Ma, X. and Likharev, K.K. (2004) Nanoelectronic Neuromorphic Networks (Crossnets): New Results. 2004 IEEE International Joint Conference on Neural Networks, Budapest, 25-29 July 2004.
|
[10]
|
Likharev, K., Mayr, A., Muckra, I. and Türel, ?. (2003) CrossNets: High-Performance Neuromorphic Architectures for CMOL Circuits. Annals of the New York Academy of Sciences, 1006, 146-163.
http://dx.doi.org/10.1196/annals.1292.010
|
[11]
|
Türel, Ö., Lee, J.H., Ma, X. and Likharev, K.K. (2004) Neuromorphic Architectures for Nanoelectronic Circuits. International Journal of Circuit Theory and Applications, 32, 277-302. http://dx.doi.org/10.1002/cta.282
|
[12]
|
Alspector, J. (1989) Neuromorphic Learning Networks. US Patent No. 4874963.
|
[13]
|
Indiveri, G., Chicca, E. and Douglas, R.J. (2009) Artificial Cognitive Systems: From VLSI Networks of Spiking Neurons to Neuromorphic Cognition. Cognitive Computation, 1, 119-127. http://dx.doi.org/10.1007/s12559-008-9003-6
|
[14]
|
Schemmel, J., Fieres, J. and Meier, K. (2008) Wafer-Scale Integration of Analog Neural Networks. IEEE International Joint Conference on Neural Networks, IJCNN 2008, Hong Kong, 1-8 June 2008, 431-438.
|
[15]
|
Zacek, K. and Nikolic, L. Analog Neural Networks. Technical University in Brno, 611.
|
[16]
|
Widrow, B., Rumelhart, D.E. and Lehr, M.A. (1994) Neural Networks: Applications in Industry, Business and Science. Communications of the ACM, 37, 93-105. http://dx.doi.org/10.1145/175247.175257
|
[17]
|
Boser, B.E., Sackinger, E., Bromley, J., Le Cun, Y. and Jackel, L.D. (1991) An Analog neural Network Processor with Programmable Topology. IEEE Journal of Solid-State Circuits, 26, 2017-2025.
http://dx.doi.org/10.1109/4.104196
|
[18]
|
Schemmel, J., Hohmann, S., Meier, K. and Schürmann, F. (2004) A Mixed-Mode Analog Neural Network Using Current-Steering Synapses. Analog Integrated Circuits and Signal Processing, 38, 233-244.
http://dx.doi.org/10.1023/B:ALOG.0000011170.92377.6e
|
[19]
|
Adhikari, S.P., Yang, C., Kim, H. and Chua, L.O. (2012) Memristor Bridge Synapse-Based Neural Network and Its Learning. IEEE Transactions on Neural Networks and Learning Systems, 23, 1426-1435.
http://dx.doi.org/10.1109/TNNLS.2012.2204770
|
[20]
|
Xiang, L., Yang, Z., Shujuan, W. and Guofu, Z. (2011) A Method for Analog Circuits Fault Diagnosis by Neural Network and Virtual Instruments. 2011 3rd International Workshop on Intelligent Systems and Applications (ISA), Wuhan, 28-29 May 2011, 1-5.
|
[21]
|
Stoica, A., Keymeulen, D., Zebulum, R., Thakoor, A., Daud, T., Klimeck, Y., et al. (2000) Evolution of Analog Circuits on Field Programmable Transistor Arrays. The 2nd NASA/DoD Workshop on Evolvable Hardware, Palo Alto, 13-15 July 2000, 99-108.
|
[22]
|
Giannini, V., Craninckx, J., D’Amico, S. and Baschirotto, A. (2007) Flexible Baseband Analog Circuits for Software-Defined Radio Front-Ends. IEEE Journal of Solid-State Circuits, 42, 1501-1512.
http://dx.doi.org/10.1109/JSSC.2007.899103
|
[23]
|
El Gamal, A. and Eltoukhy, H. (2005) CMOS Image Sensors. IEEE Circuits and Devices Magazine, 21, 6-20.
http://dx.doi.org/10.1109/MCD.2005.1438751
|
[24]
|
Cabric, D., Mishra, S.M. and Brodersen, R.W. (2004) Implementation Issues in Spectrum Sensing for Cognitive Radios. Conference Record of the 38th Asilomar Conference on Signals, Systems and Computers, 1, 772-776.
|
[25]
|
Le, B., Rondeau, T.W., Reed, J.H. and Bostian, C.W. (2005) Analog-to-Digital Converters. IEEE Signal Processing Magazine, 22, 69-77. http://dx.doi.org/10.1109/MSP.2005.1550190
|
[26]
|
Overney, F., Rufenacht, A., Braun, J., Jeanneret, B. and Wright, P.S. (2011) Characterization of Metrological Grade Analog-to-Digital Converters Using a Programmable Josephson Voltage Standard. IEEE Transactions on Instrumentation and Measurement, 60, 2172-2177. http://dx.doi.org/10.1109/TIM.2011.2113950
|
[27]
|
Fukami, S., Ishiwata, N., Numata, H., Ohshima, N., Sugibayashi, T. and Suzuki, T. (2011) Magnetic Memory Cell, Magnetic Random Access Memory, and Data Read/Write Method for Magnetic Random Access Memory. US Patent No. 7929342.
|
[28]
|
McConaghy, T., Palmers, P., Steyaert, M. and Gielen, G.G. (2011) Trustworthy Genetic Programming-Based Synthesis of Analog Circuit Topologies Using Hierarchical Domain-Specific Building Blocks. IEEE Transactions on Evolutionary Computation, 15, 557-570. http://dx.doi.org/10.1109/TEVC.2010.2093581
|
[29]
|
Mehonic, A., Vrajitoarea, A., Cueff, S., Hudziak, S., Howe, H., Labbé, C., et al. (2013) Quantum Conductance in Silicon Oxide Resistive Memory Devices. Scientific Reports, 3, Article No. 2708. http://dx.doi.org/10.1038/srep02708
|
[30]
|
Biolek, Z., Biolek, D. and Biolková, V. (2009) SPICE Model of Memristor with Nonlinear Dopant Drift. Radioengineering, 18, 210-214.
|
[31]
|
Strukov, D.B., Snider, G.S., Stewart, D.R. and Williams, R.S. (2008) The Missing Memristor Found. Nature, 453, 8083.
|