Two Analytical Methods for Detection and Elimination of the Static Hazard in Combinational Logic Circuits

Mihai Grigore Timis, Alexandru Valachi, Alexandru Barleanu, Andrei Stan

Automatic Control and Computer Engineering Faculty, Technical University Gh.Asachi, Iasi, Romania.

DOI: 10.4236/cs.2013.47061                

Abstract

In this paper, the authors continue the researches described in [1], that consists in a comparative study of two methods to eliminate the static hazard from logical functions, by using the form of Product of Sums (POS), static hazard “0”. In the first method, it used the consensus theorem to determine the cover term that is equal with the product of the two residual implicants, and in the second method it resolved a Boolean equation system. The authors observed that in the second method the digital hazard can be earlier detected. If the Boolean equation system is incompatible (doesn’t have solutions), the considered logical function doesn’t have the static 1 hazard regarding the coupled variable. Using the logical computations, this method permits to determine the needed transitions to eliminate the digital hazard.

Keywords

Combinational Circuits; Static Hazard; Logic Design; Boolean Functions

Conflicts of Interest

The authors declare no conflicts of interest.

References

[1]	“The Comparative Study of Two Analytical Methods for Detection and Elimination of the Static Hazard in Combinational Logic Circuits,” 2011 15th International Conference on System Theory, Control and Computing (ICSTCC), Sinaia, 14-16 Octomber 2011, pp. 1-4.
[2]	R. F. Tinder, “Engineering Digital Design,” Academic Press, Waltham, 2010.
[3]	Ch. Roth, “Fundamentals of Logic Design,” West Publishing Company, Eagan, 1999.
[4]	J. P. Perrin, M. Denouette and E. Daclin, “Systems Logiques,” Tome 1 Dunord, Paris, 1997.
[5]	E. T. Ringkjob, “A Method for Detection and Elimination of Static Hazards in Factored Combinational Switching Circuits,” Syracuse University, New York, 2013.
[6]	J. A. McCormick, “Detection and Elimination of Static Hazards in Multilevel XOR-SOP/EQV-POS Functions,” Washington State University, Pullman, 2013.
[7]	K. Raj, “Digital Systems Principles and Design,” Pearson Education India, Upper Saddle River, 2013.
[8]	Al. Valachi, R. Silion, V. Onofrei and Fl. Hoza, “Analysis, Synthesis and Verification of Digital Logic Systems,” Ed. Nord-Est, Iasi, 1993.
[9]	O. Ursaru and C. Aghion, “Multilevel Inverters with Imbricated Switching Cells, PWM and DPWM-Controlled,” Electronics and Electrical Engineering, Kaunas, 2010.