Circuits and Systems

Volume 6, Issue 5 (May 2015)

ISSN Print: 2153-1285   ISSN Online: 2153-1293

Google-based Impact Factor: 0.48  Citations  

A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing

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DOI: 10.4236/cs.2015.65014    4,086 Downloads   5,433 Views  Citations

ABSTRACT

This paper presents a low-phase-noise LC voltage-controlled oscillator (LC-VCO) with top resistive biasing in subthreshold region. The subthreshold LC-VCO has low-power and low-phase-noise due to its high transconductance efficiency and low gate bias condition. The top resistive biasing has more benefit with the feature of phase noise than MOS current source since it can support the low-noise characteristics and large output swing. The LC-VCO designed in 130-nm CMOS process with 0.7-V supply voltage achieves phase noise of -116 dBc/Hz at 200 kHz offset with tuning range of 398 MHz to 408 MHz covering medical implant communication service (MICS) band.

Share and Cite:

Bae, J. , Radhapuram, S. , Jo, I. , Kihara, T. and Matsuoka, T. (2015) A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing. Circuits and Systems, 6, 136-142. doi: 10.4236/cs.2015.65014.

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