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[1]
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A Comprehensive Analysis of the Architecture of Static Random Access Memory Utilizing CMOS for Mobile Applications
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2023 International Conference on …,
2023 |
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[2]
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Embracing Low-Power Systems with Improvement in Security and Energy-Efficiency
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2021 |
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[3]
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A Review on Enhancement of SRAM Memory Cell
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2020 |
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[4]
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Performance Analysis of 8T FinFET SRAM Bit-Cell for Low-power Applications
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2020 |
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[5]
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An 8T SRAM Cell with Improved ION/IOFF Ratio and with Faster Read Speed.
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2020 |
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[6]
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CMOS Receiver Design for 802.11 ac Standard Using Offline Calibrated Active Inductor Based Band Pass Filter in 90 nm Technology
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2019 |
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[7]
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New High Performance 8T SRAM Cell Using Finfet Technology
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2018 |
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[8]
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Reliability and Uniformity Enhancement in 8T-SRAM based PUFs operating at NTC
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ISLPED 2018 Proceedings of the International Symposium on Low Power Electronics and Design,
2018 |
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[9]
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Subthreshold FinFET SRAM at 20nm Technology with Improved Stability and Lower Leakage Power
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2017 |
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[10]
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Improve Performance Static Random Access Memory Based on Design PLPSRAM
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2017 |
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[11]
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A Survey of Design Low Power Static Random Access Memory
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International Journal of Current Trends in Engineering & Technology,
2017 |
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[12]
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Study of variability performance of CMOS active inductors
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Microsystem Technologies,
2017 |
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[13]
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A Novel 8T SRAM Cell using 16 nm FinFET Technology
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2017 |
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[14]
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6 GHz RF CMOS Active Inductor Band Pass Filter Design and Process Variation Detection
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2014 |
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[15]
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Static noise margin and power dissipation analysis of various SRAM topologies
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ProQuest Dissertations Publishing,
2013 |
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[16]
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IO Standard Based Green Multiplexer Design and Implementation on 40nm FPGA
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Conference Paper,
2013 |
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[17]
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Drive Strengh and LVCMOS Based Dynamic Power Reduction of ALU on FPGA
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International Conference on Information Technology and Science (ICITS 2013), Bali, Indonesia,
2013 |
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[18]
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Low voltage DCI based low power VLSI circuit implementation on FPGA
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Information & Communication Technologies (ICT), 2013 IEEE Conference on. IEEE,? ,
2013 |
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[19]
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IO Standard Based Green Multiplexer Design and Implementation on FPGA
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Computational Intelligence and Communication Networks (CICN), 2013 5th International Conference on. IEEE, 2013.,
2013 |
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[20]
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Clock Gated Low Power Memory Implementation on Virtex-6 FPGA
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Computational Intelligence and Communication Networks (CICN), 2013 5th International Conference on. IEEE, 2013.,
2013 |
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[21]
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Capacitance Based Low Power ALU Design and Implementation on 28nm FPGA
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B Pandey, J Yadav, D Singh, V Parthiban - ijset.com,
2013 |
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