Δ<i>I<sub>DDQ</sub></i> Testing of a CMOS Digital-to-Analog Converter Considering Process Variation Effects

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ISSN Print: 2153-1285
ISSN Online: 2153-1293
www.scirp.org/journal/cs
E-mail: cs@scirp.org

"ΔI_DDQ Testing of a CMOS Digital-to-Analog Converter Considering Process Variation Effects"
written by Rajiv Soundararajan, Ashok Srivastava, Siva Sankar Yellampalli,
published by Circuits and Systems, Vol.2 No.3, 2011

has been cited by the following article(s):

[1]	Investigation on the effectiveness of current supply testing methods in CMOS operational amplifiers
	2018 15th International Multi …, 2018

[2]	Modeling, Performance Analysis and Testing of Interconnects
	2016

[3]	Clock-less DFT-less Test Strategy for Null Convention Logic
	2016

[4]	Software-Based Self-Test Techniques for Online Test and Diagnosis of Embedded Controllers and Memories
	2014

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[1]	Investigation on the Effectiveness of Current Supply Testing Methods in CMOS Operational Amplifiers 2018 15th International Multi-Conference on Systems, Signals & Devices (SSD), 2018 DOI:10.1109/SSD.2018.8570527

[2]	Clock-Less DFT-Less Test Strategy for Null Convention Logic IEEE Transactions on Emerging Topics in Computing, 2018 DOI:10.1109/TETC.2016.2593628