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Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems
Cryptography,
2023
DOI:10.3390/cryptography7020029
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A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem
2023 38th Conference on Design of Circuits and Integrated Systems (DCIS),
2023
DOI:10.1109/DCIS58620.2023.10336001
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[3]
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Lightweight Polynomial Multiplication Accelerator for NTRU Using Shared SRAM
IEEE Transactions on Circuits and Systems II: Express Briefs,
2023
DOI:10.1109/TCSII.2023.3290192
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[4]
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Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems
Sensors,
2022
DOI:10.3390/s22052057
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[5]
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Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm
ACM Journal on Emerging Technologies in Computing Systems,
2021
DOI:10.1145/3445979
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Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm
ACM Journal on Emerging Technologies in Computing Systems,
2021
DOI:10.1145/3445979
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Accelerating the Development of NTRU Algorithm on Embedded Systems
2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS),
2020
DOI:10.1109/DCIS51330.2020.9268647
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VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms
IFIP Advances in Information and Communication Technology,
2019
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Q-NTRU Cryptosystem for IoT Applications
Journal of Southwest Jiaotong University,
2019
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VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms
IFIP Advances in Information and Communication Technology,
2019
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Secure and Compact Full NTRU Hardware Implementation
2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC),
2018
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Generalisations of NTRU cryptosystem
Security and Communication Networks,
2016
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Generalisations of NTRU cryptosystem
Security and Communication Networks,
2016
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