has been cited by the following article(s):
[1]
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MOS 電流模式邏輯應用於數位電路之設計
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2023 |
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[2]
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Neoteric Design Power Sustained 3-Bit Asynchronous Counter Using CNFET Based MCML Topology
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Advances in Electrical …,
2022 |
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[3]
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Comparative Analysis of Different Architectures of MCML Square Root Carry Select Adders for Low-Power Applications
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Proceedings of International Conference on ICT for Sustainable Development,
2016 |
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[4]
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Optimization of technological process to decrease dimensions of circuits XOR, manufectured based on field-effect heterotransistors
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International Journal in Foundations of Computer Science & Technology (IJFCST),
2016 |
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[5]
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OPTIMIZATION OF MANUFACTURING OF CIR-CUITS XOR TO DECREASE THEIR DIMENSIONS
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International Journal of Recent advances in Physics,
2016 |
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[6]
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MODIFICATION OF DOPANT CONCENTRA-TION PROFILE IN AField-EFFECT HETERO-TRANSISTOR FOR MODIFICATION ENERGY BAND DIAGRAM
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Advances in Materials Science and Engineering: An International Journal,
2016 |
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[7]
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Implementation and analysis of an area efficient low power SQ-CSA in MCML technique
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Reliability, Infocom Technologies and Optimization (ICRITO)(Trends and Future Directions), 2015 4th International Conference on,
2015 |
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[8]
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Testing current mode two-input logic gates
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Electrical and Computer Engineering (CCECE), 2014 IEEE 27th Canadian Conference on. IEEE, 2014.,
2014 |
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[1]
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Proceedings of International Conference on ICT for Sustainable Development
Advances in Intelligent Systems and Computing,
2016
DOI:10.1007/978-981-10-0135-2_29
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[2]
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Implementation and analysis of an area efficient low power SQ-CSA in MCML technique
2015 4th International Conference on Reliability, Infocom Technologies and Optimization (ICRITO) (Trends and Future Directions),
2015
DOI:10.1109/ICRITO.2015.7359329
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[3]
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Testing current mode two-input logic gates
2014 IEEE 27th Canadian Conference on Electrical and Computer Engineering (CCECE),
2014
DOI:10.1109/CCECE.2014.6901052
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