Circuits and Systems

Circuits and Systems

ISSN Print: 2153-1285
ISSN Online: 2153-1293
www.scirp.org/journal/cs
E-mail: cs@scirp.org
"Design of an Efficient Binary Vedic Multiplier for High Speed Applications Using Vedic Mathematics with Bit Reduction Technique"
written by S. K. Manikandan, C. Palanisamy,
published by Circuits and Systems, Vol.7 No.9, 2016
has been cited by the following article(s):
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