Circuits and Systems

Circuits and Systems

ISSN Print: 2153-1285
ISSN Online: 2153-1293
www.scirp.org/journal/cs
E-mail: cs@scirp.org
"Algorithmic Optimization of BDDs and Performance Evaluation for Multi-level Logic Circuits with Area and Power Trade-offs"
written by Saurabh Chaudhury, Anirban Dutta,
published by Circuits and Systems, Vol.2 No.3, 2011
has been cited by the following article(s):
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[1] Ordering Variables in BDD Diagrams
2021
[2] Reduced ordered binary decision diagram-based combinational circuit synthesis for optimising area, power and temperature
2019
[3] Study and Analysis of Minimization Algorithms for VLSI Circuit Synthesis
2018
[4] An efficient hybrid approach for resolving the aircraft routing and rescheduling problem
Journal of Air Transport Management, 2018
[5] Variable ordering of BDD mapped multi-input multi-output adders using modified genetic algorithm
2017
[6] A Genetic Algorithm for ordering and reduction of BDDs using Crossover Operators for MIMO VLSI Circuits
2017
[7] Low Power Optimization Technique and a genetic minimization algorithm for variable ordering of BDD mapped VLSI Circuits
International Journal of Electrical & Computer Sciences , 2017
[8] A Novel and Efficient Variable Ordering and Minimization Algorithm based on Evolutionary Computation
2017
[9] Area, power and temperature optimization during binary decision diagram based circuit synthesis
2017
[10] Modified GA method for variable ordering in BDD for MIMO digital circuits
2016
[11] 基于 ROBDD 的电路功耗估算方法
2016
[12] Improvement in Performance Parameters Using Heuristic Algorithm for VLSI Circuits
2016
[13] Implementation of evolutionary algorithm with effective use of crossover operators for BDD mapped circuits
2015
[14] 粒计算在数字逻辑电路分析与设计中的应用
计算机科学与探索, 2015
[15] BDD Ordering and Minimization Using Various Crossover Operators in Genetic Algorithm
R Kaur, M Bansal - ijireeice.com, 2014
[16] A heuristic approach to variable ordering for logic synthesis engine design: algorithmic insight
International Journal of Circuits and Architecture Design, 2014
[17] Effect of various Crossover operators in Memetic algorithm on Multi-input adders
M Anamika, M Bansal - ijireeice.com, 2014
[18] New multiplexer-based switching circuits synthesis methods
P Pi?tek - acmbulletin.fiit.stuba.sk, 2014
[19] Implementation of Evolutionary Algorithms for BDD Mapped Circuits To Improve Performance Parameters
2014
[20] Algorithmic Reduction And Optimization Of Logic Circuit In Area And Power Tradeoffs' With The Help Of Binary Decision Diagram
International Journal of Engineering and Computer Science, 2014
[21] Performance Comparison among different Evolutionary Algorithms in terms of Node Count Reduction in BDDs
International Journal of VLSI and Embedded Systems, 2013
[22] Binary decision diagram optimization method based on multiplexer reduction methods
System Science and Engineering (ICSSE), 2013 International Conference on. IEEE, 2013
[23] BDD Ordering: A Method to Minimize BDD Size by Using Improved Initial Order
MDB SIDDIQUI, M BANSAL - ijves.com, 2013
[24] Implementation Of Hybrid Evolutionary Algorithm For Bdd Optimization By Finding Optimum Variable Ordering
S Rehan, M Bansal - dspace.thapar.edu, 2013
[25] Implementation Of Reduced Ordered Binary Decision Diagram For Feature Optimization
2013
[26] Implementation of an Improved Initial Order in Various Dynamic Variable Ordering Techniques for BDDs
2013
[27] Ordering and reduction of BDDs for multi-input adders using evolutionary algorithm
2013
[28] Genetic algorithm for ordering and reduction of BDDs for MIMO circuits
2013
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