A Fast FPGA Implementation for Triple DES Encryption Scheme

ISSN Print: 2153-1285
ISSN Online: 2153-1293

Website: https://www.scirp.org/journal/cs
E-mail: cs@scirp.org

Citations h5-index & Ranking

Submission

"A Fast FPGA Implementation for Triple DES Encryption Scheme"
written by Edni Del Rosal, Sanjeev Kumar,
published by Circuits and Systems, Vol.8 No.9, 2017

has been cited by the following article(s):

[1]	A Dynamic Round Triple Data Encryption Standard Cryptographic Technique for Data Security
	2020

[2]	Programmable Cellular Automata Based Random Key Generation for One-Time Pad Encryption Using Unity Attractors
	2019

[3]	Improved Mix Column Computation of Cryptographic AES
	2019

[4]	Security Evaluation of Virtualized Computing Platforms
	ProQuest Dissertations Publishing, 2017

[5]	Design and implementation of IP core for RoadRunneR-128 block cipher
	2017

[1]	Computational Science and Its Applications – ICCSA 2020 Lecture Notes in Computer Science, 2020 DOI:10.1007/978-3-030-58817-5_36

[2]	Improved Mix Column Computation of Cryptographic AES 2019 2nd International Conference on Data Intelligence and Security (ICDIS), 2019 DOI:10.1109/ICDIS.2019.00042

[3]	Programmable Cellular Automata Based Random Key Generation for One-Time Pad Encryption Using Unity Attractors Journal of Applied Security Research, 2019 DOI:10.1080/19361610.2019.1652475

[4]	Design and implementation of IP core for RoadRunneR-128 block cipher 2017 International Conference on Public Key Infrastructure and its Applications (PKIA), 2017 DOI:10.1109/PKIA.2017.8278961