Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time Resolution

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ISSN Print: 2153-1285
ISSN Online: 2153-1293
www.scirp.org/journal/cs
E-mail: cs@scirp.org

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"Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time Resolution"
written by Chin-Hsin Lin, Marek Syrzycki,
published by Circuits and Systems, Vol.2 No.4, 2011

has been cited by the following article(s):

[1]	De l'Université de recherche Paris Sciences et Lettres
	2018

[2]	Versatile Noise Suppressed Variable Pulse Voltage Controlled Oscillator
	International Journal of Applied Engineering Research, 2015

[3]	On-chip time-domain metrology using time-to-digital converters and time difference amplifier in submicron CMOS
	NULL 2012

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