An FPGA-Based Resource-Saving Hardware Accelerator for Deep Neural Network

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ISSN Print: 2163-0283
ISSN Online: 2163-0356
www.scirp.org/journal/ijis
E-mail: ijis@scirp.org

"An FPGA-Based Resource-Saving Hardware Accelerator for Deep Neural Network"
written by Han Jia, Xuecheng Zou,
published by International Journal of Intelligence Science, Vol.11 No.2, 2021

has been cited by the following article(s):

[1]	Configurable CNN Accelerator in Speech Processing based on Vector Convolution
	2022 IEEE 4th International …, 2022

[2]	High-Level Design of 2D-Convolution Accelerators for AI Leveraging Embedded Scalable Platform (ESP)
	2022

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