NP-Domino, Ultra-Low-Voltage, High-Speed, Dual-Rail, CMOS NOR Gates

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DOI: 10.4236/cs.2016.78166    1,913 Downloads   3,632 Views  Citations

ABSTRACT

In this paper, novel ultra low voltage (ULV) dual-rail NOR gates are presented which use the semi-floating-gate (SFG) structure to speed up the logic circuit. Higher speed in the lower supply voltages and robustness against the input signal delay variations are the main advantages of the proposed gates in comparison to the previously reported domino dual-rail NOR gates. The simulation results in a typical TSMC 90 nm CMOS technology show that the proposed NOR gate is more than 20 times faster than conventional dual-rail NOR gate.

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Dadashi, A., Mirmotahari, O. and Berg, Y. (2016) NP-Domino, Ultra-Low-Voltage, High-Speed, Dual-Rail, CMOS NOR Gates. Circuits and Systems, 7, 1916-1926. doi: 10.4236/cs.2016.78166.

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