Share This Article:

High Performance Novel Square Root Architecture Using Ancient Indian Mathematics for High Speed Signal Processing

Full-Text HTML Download Download as PDF (Size:848KB) PP. 428-441
DOI: 10.4236/apm.2015.58042    2,642 Downloads   3,323 Views Citations

ABSTRACT

Novel high speed energy efficient square root architecture has been reported in this paper. In this architecture, we have blended ancient Indian Vedic mathematics and Bakhshali mathematics to achieve a significant amount of accuracy in performing the square root operation. Basically, Vedic Duplex method and iterative division method reported in Bakhshali Manuscript have been utilized for that computation. The proposed technique has been compared with the well known Newton-Raphson’s (N-R) technique for square root computation. The algorithm has been implemented and tested using Modelsim simulator, and performance parameters such as the number of lookup tables, propagation delay and power consumption have been estimated using Xilinx ISE simulator. The functionality of the circuitry has been checked using Xilinx Virtex-5 FPGA board.

Cite this paper

Banerjee, A. , Ghosh, A. and Das, M. (2015) High Performance Novel Square Root Architecture Using Ancient Indian Mathematics for High Speed Signal Processing. Advances in Pure Mathematics, 5, 428-441. doi: 10.4236/apm.2015.58042.

Copyright © 2020 by authors and Scientific Research Publishing Inc.

Creative Commons License

This work and the related PDF file are licensed under a Creative Commons Attribution 4.0 International License.