Author(s)

Xin Cheng^1*, Yizhong Yang¹, Longjie Du¹, Yang Chen^1,2, Guangjun Xie^1,2

¹School of Electronic Science and Applied Physics, Hefei University of Technology, Hefei, China.
¹State Key Lab of ASIC and System, Fudan University, Shanghai, China.
²State Key Lab of ASIC and System, Fudan University, Shanghai, China.

An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage and the LDO regulator can be stable for all load conditions. The proposed structure also employs a momentarily current-boosting circuit to reduce the output voltage to the normal value when output is switched from full load to no load. The whole circuit is designed in a 0.18 μm CMOS technology with a quiescent current of 550 nA. The maximum output voltage variation is less than 20 mV when used with 1 μF external capacitor.

Ultra-Low Quiescent Current; Low-Dropout Regulator; Small Output Variations

Cheng, X. , Yang, Y. , Du, L. , Chen, Y. and Xie, G. (2014) An Ultra-Low Quiescent Current CMOS Low-Dropout Regulator with Small Output Voltage Variations. Journal of Power and Energy Engineering, 2, 477-482. doi: 10.4236/jpee.2014.24064.