TITLE:
Reliability of High Speed Ultra Low Voltage Differential CMOS Logic
AUTHORS:
Omid Mirmotahari, Yngvar Berg
KEYWORDS:
CMOS, Differential, Floating-Gate, Semi-Floating-Gate, Keeper, Recharge, Ultra Low Voltage, High Speed, Monte-Carlo, Cadence, STM, 90 nm
JOURNAL NAME:
Circuits and Systems,
Vol.6 No.5,
May
22,
2015
ABSTRACT: In this
paper, we present a solution to the ultra low voltage inverter by adding a
keeper transistor in order to make the semi-floating-gate more stable and to
reduce the current dissipation. Moreover, we also present a differential ULV
inverter and elaborate on the reliability and fault tolerance of the gate. The
differential ULV gate compared to both a former ULV gate and standard CMOS are
given. The results are obtained through Monte-Carlo simulations.