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International Conference of China Communication and Technology (ICCCT 2010 E-BOOK)

Nan'ning,China,10.9-10.10,2010

ISBN: 978-1-935068-52-5 Scientific Research Publishing, USA

E-Book 454pp Pub. Date: October 2010

Category: Computer Science & Communications

Price: $80

Title: Research of Random Verification Environment Based on VMM
Source: International Conference of China Communication and Technology (ICCCT 2010 E-BOOK) (pp 49-53)
Author(s): Jian-hong Zheng, College of Communications and Information Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065, China
Shi Chen, College of Communications and Information Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065, China
Abstract: This paper describes a test bench architecture based on System Verilog Verification Methodology Manual (VMM), which help to gain maximum efficiency with the development of both constrained random test case and directed test case. We specify a novel way in which directed test traffic can be implemented in a complete random test traffic generator, and it is used in the verification of the DMA module. The result of the case proves that this method can improve the verification efficiency.
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