has been cited by the following article(s):
[1]
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Design of area-speed efficient Anurupyena Vedic multiplier for deep learning applications
Analog Integrated Circuits and Signal Processing,
2024
DOI:10.1007/s10470-024-02255-2
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[2]
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Comparative analysis of Yavadunam Tavadunikrtya Varganca Yojayet Vedic multiplier for embedded DNN
Sādhanā,
2022
DOI:10.1007/s12046-022-01843-0
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[3]
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Review of Vedic Multiplier Using Various Full Adders
2021 5th International Conference on Computing Methodologies and Communication (ICCMC),
2021
DOI:10.1109/ICCMC51019.2021.9418339
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[4]
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Speed, power and area efficient 2D FIR digital filter using vedic multiplier with predictor and reusable logic
Analog Integrated Circuits and Signal Processing,
2021
DOI:10.1007/s10470-021-01853-8
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[5]
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Design and investigation of low-complexity Anurupyena Vedic multiplier for machine learning applications
Sādhanā,
2020
DOI:10.1007/s12046-020-01500-4
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